Intel 41210 User Manual
52
Intel
®
41210 Serial to Parallel PCI Bridge Developer’s Manual
Transaction Ordering
6.2
Downstream Transaction Ordering
lists the combined set of ordering rules in the downstream path of the 41210.
6.3
Relaxed Ordering/No-Snoop Support
The 41210 forwards the PCI Express*/PCI-X relaxed ordering and no-snoop attributes to
PCI-X/PCI Express*. No internal optimization is done with the relaxed ordering attribute.
PCI-X/PCI Express*. No internal optimization is done with the relaxed ordering attribute.
§ §
Table 22.
Downstream Transaction Ordering
Row pass Column
Posted Write
Delayed/Split Read
Request
Delayed/Split Write
Request
Delayed/Split Read
Completion
Posted write
No
Yes
Yes
Yes
Delayed/split read request
No
Yes
Yes
Yes
Delayed/split write request
No
Yes
Yes
Yes
Delayed/split read completion
No
Yes
Yes
Yes
Delayed/split write completion
No
Yes
Yes
Yes
NOTE:
1. The Intel
®
41210 Serial to Parallel PCI Bridge supports two downstream completion required requests per PCI segment.
Downstream delayed/split read requests can pass each other when issued on the PCI bus.