Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
SAM9N12/CN11-EK User Guide
4-11
11186A–ATARM–29-Nov-12
4.3.10
Serial Peripheral Interface (SPI) Controller
The SAM9N12/CN11 serial processor provides two high-speed Serial Peripheral Interface (SPI) control-
lers. One port is used to interface with the on-board serial DataFlash.
lers. One port is used to interface with the on-board serial DataFlash.
A 3-state buffer is in serial with DataFlash CS signal, with PB1 to give a manually disable manner for
DataFlash boot.
DataFlash boot.
Figure 4-13. SPI DataFlash
4.3.11
Two Wire Interface (TWI)
The SAM9N12/CN11 processor has two full speed (400 kHz) master/slave I2C serial controllers. The
controllers are fully compatible with the industry standard I2C interfaces. On the EK board, TWI0 port is
used to interface with serial EEPROM, QTouch device and audio CODEC interface.
controllers are fully compatible with the industry standard I2C interfaces. On the EK board, TWI0 port is
used to interface with serial EEPROM, QTouch device and audio CODEC interface.
SAM9N12/CN11 processor supports TWI EEPROM boot at the device address of 0x50. On board, the
EEPROM device address is 0x51. Customer needs to dismount R61 and mount R62 as 10 kohms, if
EEPROM boot is needed.
EEPROM device address is 0x51. Customer needs to dismount R61 and mount R62 as 10 kohms, if
EEPROM boot is needed.
Figure 4-14. EEPROM
R56
0R
R57
0R
R58
0R
VDDIOP0
VDDIOP0
MN9
AT25DF321A
AT25DF321A
HOLD
7
GND
4
VCC
8
CS
1
SCK
6
SI
5
SO
2
WP
3
PA12
PA11
PA11
(SPI0_MOSI )
(SPI0_MI S0)
(SPI0_SPCK)
(SPI0_MI S0)
(SPI0_SPCK)
(SPI0_NPCS0)
C59
100nF
R55
470K
OE_Dataf lash
VDDIOP0
PA14
C58
100nF
MN8
NL17SZ126
NL17SZ126
OE
1
VCC
5
GND
3
OUT
4
IN
2
PA13
MN 10
AT24C512C -SSH D -T
AT24C512C -SSH D -T
A0
1
A1
2
W P
7
SC L
6
VC C
8
A3
3
SD A
5
GN D
4
VD D IOP0
R61
10K
VDD IOP0
VD D IOP0
PA31
PA30
PA30
(TW D O)
(TW C KO)
R 59
4.7K
VD D IOP0
R62
D N P
R 60
4.7K
C 60
100nF