Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

124

SAM9G25 [DATASHEET]

11032C–ATARM–25-Jan-13

RSTC_MR

0xFFFFFE08

Read-write

This field defines the external reset length. The external reset is asserted during a time of 2

(ERSTL+1)

 Slow Clock cycles. This 

allows assertion duration to be programmed between 60 µs and 2 seconds.

Should be written at value 0xA5. Writing any other value in this field aborts the write operation.

31

30

29

28

27

26

25

24

KEY

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

ERSTL

7

6

5

4

3

2

1

0

–

–

– 

–

–

–

–