Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
167
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
20.
Slow Clock Controller (SCKC)
20.1
Description
The System Controller embeds a Slow Clock Controller.
The slow clock can be generated either by an external 32768 Hz crystal oscillator or by the on-chip 32 kHz RC oscillator.
The 32768 Hz crystal oscillator can be bypassed by setting the OSC32BYP bit to accept an external slow clock on
XIN32.
The 32768 Hz crystal oscillator can be bypassed by setting the OSC32BYP bit to accept an external slow clock on
XIN32.
The internal 32 kHz RC oscillator and the 32768 Hz oscillator can be enabled by setting to 1, respectively, RCEN bit and
OSC32EN bit in the System Controller user interface. The OSCSEL command selects the slow clock source.
OSC32EN bit in the System Controller user interface. The OSCSEL command selects the slow clock source.
20.2
Embedded Characteristics
z
32 kHz RC Oscillator or 32768 Hz Crystal Oscillator Selector
z
VDDBU Powered
20.3
Block Diagram
Figure 20-1. Block Diagram
RCEN, OSC32EN, OSCSEL and OSC32BYP bits are located in the Slow Clock Configuration Register (SCKC_CR)
located at the address 0xFFFFFE50 in the backed up part of the System Controller and, thus, they are preserved while
VDDBU is present.
located at the address 0xFFFFFE50 in the backed up part of the System Controller and, thus, they are preserved while
VDDBU is present.
After a VDDBU power on reset, the default configuration is RCEN = 1, OSC32EN = 0 and OSCSEL = 0, allowing the
system to start on the internal 32 kHz RC oscillator.
system to start on the internal 32 kHz RC oscillator.
The programmer controls the slow clock switching by software and so must take precautions during the switching phase.
On Chip
RC OSC
RC OSC
Slow Clock
SLCK
SLCK
XIN32
XOUT32
Slow Clock
Oscillator
OSC32EN
RCEN
OSCSEL
OSC32BYP