Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1102
169
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
20.4
Slow Clock Configuration (SCKC) User Interface  
Table 20-1. Register Mapping
Offset
Register
Name
Access
Reset 
0x0
Slow Clock Configuration Register
SCKC_CR
Read-write
0x0000_0001