Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet
Product codes
AT91SAM9G25-EK
325
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
27.4
Functional Description
The NAND Flash sector size is programmable and can be set to 512 bytes or 1024 bytes. The
PMECC module generates redundancy at encoding time, when a NAND write page operation is
performed. The redundancy is appended to the page and written in the spare area. This operation is
performed by the processor. It moves the content of the PMECCx registers into the NAND Flash
memory. The number of registers depends on the selected error correction capability, refer to
PMECC module generates redundancy at encoding time, when a NAND write page operation is
performed. The redundancy is appended to the page and written in the spare area. This operation is
performed by the processor. It moves the content of the PMECCx registers into the NAND Flash
memory. The number of registers depends on the selected error correction capability, refer to
generates the remainder of the received codeword by minimal polynomials. When all polynomial
remainders for a given sector are set to zero, no error occurred. When the polynomial remainders are
other than zero, the codeword is corrupted and further processing is required.
remainders for a given sector are set to zero, no error occurred. When the polynomial remainders are
other than zero, the codeword is corrupted and further processing is required.
The PMECC module generates an interrupt indicating that an error occurred. The processor must
read the PMECCISR register. This register indicates which sector is corrupted.
read the PMECCISR register. This register indicates which sector is corrupted.
To find the error location within a sector, the processor must execute the decoding steps as follows:
1.
Syndrome computation
2.
Find the error locator polynomials
3.
Find the roots of the error locator polynomial
All decoding steps involve finite field computation. It means that a library of finite field arithmetic must
be available to perform addition, multiplication and inversion. The finite field arithmetic operations can
be performed through the use of a memory mapped lookup table, or direct software implementation.
The software implementation presented is based on lookup tables. Two tables named gf_log and
gf_antilog are used. If alpha is the primitive element of the field, then a power of alpha is in the field.
Assume beta = alpha ^ index, then beta belongs to the field, and gf_log(beta) = gf_log(alpha ^ index)
= index. The gf_antilog tables provide exponent inverse of the element, if beta = alpha ^ index, then
gf_antilog(index) = beta.
be available to perform addition, multiplication and inversion. The finite field arithmetic operations can
be performed through the use of a memory mapped lookup table, or direct software implementation.
The software implementation presented is based on lookup tables. Two tables named gf_log and
gf_antilog are used. If alpha is the primitive element of the field, then a power of alpha is in the field.
Assume beta = alpha ^ index, then beta belongs to the field, and gf_log(beta) = gf_log(alpha ^ index)
= index. The gf_antilog tables provide exponent inverse of the element, if beta = alpha ^ index, then
gf_antilog(index) = beta.
The first step consists of the syndrome computation. The PMECC module computes the remainders
and software must substitute the power of the primitive element.
and software must substitute the power of the primitive element.
The procedure implementation is given in
The second step is the most software intensive. It is the Berlekamp’s iterative algorithm for finding the
error-location polynomial.
error-location polynomial.
The procedure implementation is given in
The Last step is finding the root of the error location polynomial. This step can be very software
intensive. Indeed, there is no straightforward method of finding the roots, except by evaluating each
element of the field in the error location polynomial. However a hardware accelerator can be used to
find the roots of the polynomial. The Programmable Multibit Error Correction Code Location
(PMERRLOC) module provides this kind of hardware acceleration.
intensive. Indeed, there is no straightforward method of finding the roots, except by evaluating each
element of the field in the error location polynomial. However a hardware accelerator can be used to
find the roots of the polynomial. The Programmable Multibit Error Correction Code Location
(PMERRLOC) module provides this kind of hardware acceleration.