Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet
Product codes
AT91SAM9X35-EK
10
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
When “Reset State” is mentioned, the configuration is defined by the “Reset State” column of the Pin Description table.
4.2.1
Reset State
In the tables that follow, the column “Reset State” indicates the reset state of the line with mnemonics.
“PIO” “/” signal
Indicates whether the PIO Line resets in I/O mode or in peripheral mode. If “PIO” is mentioned, the PIO Line is
maintained in a static state as soon as the reset is released. As a result, the bit corresponding to the PIO Line in the
register PIO_PSR (Peripheral Status Register) resets low.
maintained in a static state as soon as the reset is released. As a result, the bit corresponding to the PIO Line in the
register PIO_PSR (Peripheral Status Register) resets low.
If a signal name is mentioned in the “Reset State” column, the PIO Line is assigned to this function and the
corresponding bit in PIO_PSR resets high. This is the case of pins controlling memories, in particular the address lines,
which require the pin to be driven as soon as the reset is released.
corresponding bit in PIO_PSR resets high. This is the case of pins controlling memories, in particular the address lines,
which require the pin to be driven as soon as the reset is released.
“I”/“O”
Indicates whether the signal is input or output state.
“PU”/ “PD”
Indicates whether Pull-Up, Pull-Down or nothing is enabled.
“ST”
Indicates if Schmitt Trigger is enabled.
Note:
Note:
Example:
The PB18 “Reset State” column shows “PIO, I, PU, ST”. That means the line PIO18 is configured as
an Input with Pull-Up and Schmitt Trigger enabled. PD14 reset state is “PIO, I, PU”. That means PIO Input with
Pull-Up. PD15 reset state is “A20, O, PD” which means output address line 20 with Pull-Down.
Pull-Up. PD15 reset state is “A20, O, PD” which means output address line 20 with Pull-Down.
Table 4-2.
SAM9X35 I/O Type Assignment and Frequency
I/O Type
I/O Frequency
(MHz)
Charge Load
(pF)
Output Current
Signal Name
GPIO
40
10
All PIO lines except GPIO_CLK, GPIO_CLK2, and GPIO_ANA
GPIO_CLK
54
10
MCI0CK, MCI1CK, SPI0SPCK, SPI1SPCK, EMACx_ETXCK
GPIO_CLK2
75
10
GPIO_ANA
25
10
16 mA, 40 mA (peak) ADx, GPADx
EBI
133
50 (3.3V)
30 (1.8V)
30 (1.8V)
All data lines (Input/output)
EBI_O
66
50 (3.3V)
30 (1.8V)
30 (1.8V)
All address and control lines (output only) except EBI_CLK
EBI_CLK
133
10
CK, #CK
RSTJTAG
10
10
NRST, NTRST, BMS, TCK, TDI, TMS, TDO, RTCK
SYSC
0.25
10
WKUP, SHDN, JTAGSEL, TST, SHDN
VBG
0.25
10
VBG
USBFS
12
10
HFSDPA, HFSDPB/DFSDP, HFSDPC, HFSDMA,
HFSDMB/DFSDM, HFSDMC
HFSDMB/DFSDM, HFSDMC
USBHS
480
10
HHSDPA, HHSDPB/DHSDP, HHSDMA, HHSDMB/DHSDM
CLOCK
50
50
XIN, XOUT, XIN32, XOUT32
DIB
25
25
DIBN, DIBP