Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

Product codes
AT91SAM9X35-EK
Page of 1301
1083
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.3 Block Diagram
Figure 46-1.  Block Diagram
32-bit
AHB
Master
Interface
DEAG
Unit
SYSCTRL
Unit
32-bit
APB Interface
Configuration
Registers
Base
Layer
CLUT
HEO
Layer
CLUT
CSC
2DSC
CUE
OVR1
Layer
CLUT
HCC
Layer
CLUT
GAB
Unit
LTE
Unit
LCD_DAT[23:0]
LCD_VSYNC
LCD_HSYNC
LCD_PCLK
LCD_DEN
LCD_PWM
LCD_DISP
CUE: Chroma Upsampling Engine
HEO: High End Overlay
CSC: Color Space Conversion
2DSC: Two Dimension Scaler
DEAG: DMA Engine Address Generation
HCC: Hardware Cursor Channel  
GAB: Global Alpha Blender
LTE: LCD Timing Engine
ROT: Hardware Rotation
ROT
ROT
AHB
Bus