Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet
Product codes
AT91SAM9X35-EK
1120
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.7.2 LCD Controller Configuration Register 1
Name:
LCDC_LCDCFG1
Address:
0xF8038004
Access:
Read-write
Reset:
0x00000000
• HSPW: Horizontal Synchronization Pulse Width
Width of the LCD_HSYNC pulse, given in pixel clock cycles. Width is (HSPW+1) LCD_PCLK cycles.
• VSPW: Vertical Synchronization Pulse Width
Width of the LCD_VSYNC pulse, given in number of lines. Width is (VSPW+1) lines.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
VSPW
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
HSPW