Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

Product codes
AT91SAM9X35-EK
Page of 1301
1267
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
Figure 47-23.Minimum and Maximum Access Time of Output Signals
47.18.3 HSMCI
The High Speed MultiMedia Card Interface (HSMCI) supports the MultiMedia Card (MMC) Specification V4.3, the SD
Memory Card Specification V2.0, the SDIO V2.0 specification and CE-ATA V1.1.
47.18.4 EMAC
47.18.4.1 Timing conditions
47.18.4.2 Timing constraints
Note:
1. For EMAC output signals, minimum and maximum access times are defined. The minimum access time is 
the time between the EDMC rising edge and the signal change. The maximum access timing is the time 
between the EDMC rising edge and the signal stabilizes. 
 illustrates minimum and maximum 
accesses for EMAC3. 
TK (CKI =0)
TF/TD
SSC
0min
TK (CKI =1)
SSC
0max
Table 47-42. Capacitance Load on Data, Clock Pads
Supply
Corner
MAX
Typical Voltage High
Temperature
MIN
3.3V
20 pF
20 pF
0 pF
1.8V
20 pF
20 pF
0 pF
Table 47-43. EMAC Signals Relative to EMDC
Symbol
Parameter
Min (ns)
Max (ns)
EMAC
1
Setup for EMDIO from EMDC rising
10
EMAC
2
Hold for EMDIO from EMDC rising
10
EMAC
3
EMDIO toggling from EMDC rising
300