Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet
Product codes
AT91SAM9X35-EK
167
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
21.4 Slow Clock Selection
The slow clock can be generated either by an external 32768 Hz crystal or by the on-chip 32 kHz RC oscillator.
The 32768 Hz crystal oscillator can be bypassed by setting the OSC32BYP bit to accept an external slow clock on
XIN32.
The 32768 Hz crystal oscillator can be bypassed by setting the OSC32BYP bit to accept an external slow clock on
XIN32.
The internal 32 kHz RC oscillator and the 32768 Hz oscillator can be enabled by setting to 1, respectively, the RCEN bit
and the OSC32EN bit in the System Controller user interface. The OSCSEL command selects the slow clock source.
and the OSC32EN bit in the System Controller user interface. The OSCSEL command selects the slow clock source.
Figure 21-2. Slow Clock
RCEN, OSC32EN,OSCSEL and OSC32BYP bits are located in the Slow Clock Control Register (SCKCR) located at
address 0xFFFFFE50 in the backed up part of the System Controller and so are preserved while VDDBU is present.
address 0xFFFFFE50 in the backed up part of the System Controller and so are preserved while VDDBU is present.
After a VDDBU power on reset, the default configuration is RCEN = 1, OSC32EN = 0 and OSCSEL = 0, BYPASS = 0,
allowing the system to start on the internal 32 kHz RC oscillator.
allowing the system to start on the internal 32 kHz RC oscillator.
The programmer controls the slow clock switching by software and so must take precautions during the switching phase.
21.4.1 Switch from Internal 32 kHz RC Oscillator to the 32768 Hz Crystal
To switch from internal 32 kHz RC oscillator to the 32768 Hz crystal, the programmer must execute the following
sequence:
sequence:
Switch the master clock to a source different from slow clock (PLL or Main Oscillator) through the Power
Management Controller.
Management Controller.
Enable the 32768 Hz oscillator by setting the bit OSC32EN to 1.
Wait 32768 Hz Startup Time for clock stabilization (software loop).
Switch from internal 32 kHz RC to 32768 Hz oscillator by setting the bit OSCSEL to 1.
Wait 5 slow clock cycles for internal resynchronization.
Disable the 32 kHz RC oscillator by setting the bit RCEN to 0.
Switch the master clock back to the slow clock domain
21.4.2 Bypass the 32768 Hz Oscillator
The following step must be added to bypass the 32768 Hz Oscillator.
An external clock must be connected on XIN32.
Enable the bypass path OSC32BYP bit set to 1.
Disable the 32768 Hz oscillator by setting the OSC32EN bit to 0.
On Chip
RC OSC
RC OSC
Slow Clock
SLCK
SLCK
XIN32
XOUT32
Slow Clock
Oscillator
Clock Generator
OSC32EN
RCEN
OSCSEL
OSC32BYP