Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet
Product codes
AT91SAM9X35-EK
518
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
32.6.10.9 Data OUT
32.6.10.10 Bulk OUT or Interrupt OUT
Like data IN, data OUT packets are sent by the host during the data or the status stage of control transfer or during an
interrupt/bulk/isochronous OUT transfer. Data buffers are sent packet by packet under the control of the application or
under the control of the DMA channel.
interrupt/bulk/isochronous OUT transfer. Data buffers are sent packet by packet under the control of the application or
under the control of the DMA channel.
32.6.10.11 Bulk OUT or Interrupt OUT: Receiving a Packet Under Application Control (Host to Device)
Algorithm Description for Each Packet:
The application enables an interrupt on RXRDY_TXKL.
When an interrupt on RXRDY_TXKL is received, the application knows that UDPHS_EPTSTAx register
BYTE_COUNT bytes have been received.
BYTE_COUNT bytes have been received.
The application reads the BYTE_COUNT bytes from the endpoint.
The application clears RXRDY_TXKL.
Note:
If the application does not know the size of the transfer, it may not be a good option to use AUTO_VALID.
Because if a zero-length-packet is received, the RXRDY_TXKL is automatically cleared by the AUTO_VALID
hardware and if the endpoint interrupt is triggered, the software will not find its originating flag when reading the
UDPHS_EPTSTAx register.
Because if a zero-length-packet is received, the RXRDY_TXKL is automatically cleared by the AUTO_VALID
hardware and if the endpoint interrupt is triggered, the software will not find its originating flag when reading the
UDPHS_EPTSTAx register.
Algorithm to Fill Several Packets:
The application enables the interrupts of BUSY_BANK and AUTO_VALID.
When a BUSY_BANK interrupt is received, the application knows that all banks available for the endpoint have
been filled. Thus, the application can read all banks available.
been filled. Thus, the application can read all banks available.
If the application doesn’t know the size of the receive buffer, instead of using the BUSY_BANK interrupt, the application
must use RXRDY_TXKL.
must use RXRDY_TXKL.
32.6.10.12 Bulk OUT or Interrupt OUT: Sending a Buffer Using DMA (Host To Device)
To use the DMA setting, the AUTO_VALID field is mandatory.
for more information.
DMA Configuration Example:
1.
First program UDPHS_DMAADDRESSx with the address of the buffer that should be transferred.
2.
Enable the interrupt of the DMA in UDPHS_IEN
3.
Program the DMA Channelx Control Register:
Size of buffer to be sent.
END_B_EN: Can be used for OUT packet truncation (discarding of unbuffered packet data) at the end of
DMA buffer.
DMA buffer.
END_BUFFIT: Generate an interrupt when BUFF_COUNT in the UDPHS_DMASTATUSx register reaches
0.
0.
END_TR_EN: End of transfer enable, the UDPHS device can put an end to the current DMA transfer, in
case of a short packet.
case of a short packet.
END_TR_IT: End of transfer interrupt enable, an interrupt is sent after the last USB packet has been
transferred by the DMA, if the USB transfer ended with a short packet. (Beneficial when the receive size is
unknown.)
transferred by the DMA, if the USB transfer ended with a short packet. (Beneficial when the receive size is
unknown.)
CHANN_ENB: Run and stop at end of buffer.
For OUT transfer, the bank will be automatically cleared by hardware when the application has read all the bytes in the
bank (the bank is empty).
Notes: 1. When a zero-length-packet is received, RXRDY_TXKL bit in UDPHS_EPTSTAx is cleared automatically by
bank (the bank is empty).
Notes: 1. When a zero-length-packet is received, RXRDY_TXKL bit in UDPHS_EPTSTAx is cleared automatically by
AUTO_VALID, and the application knows of the end of buffer by the presence of the END_TR_IT.
2. If the host sends a zero-length packet, and the endpoint is free, then the device sends an ACK. No data is
written in the endpoint, the RXRDY_TXKL interrupt is generated, and the BYTE_COUNT field in
UDPHS_EPTSTAx is null.
UDPHS_EPTSTAx is null.