Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

548

SAM9X35 [DATASHEET]

11055E–ATARM–10-Mar-2014

Name: UDPHS_EPTCTLx 

[x=0..6]

Read-only

This register view is relevant only if EPT_TYPE=0x0, 0x2 or 0x3 in 

0 = If cleared, the endpoint is disabled according to the device configuration. Endpoint 0 should always be enabled after a hard-
ware or UDPHS bus reset and participate in the device configuration.

1 = If set, the endpoint is enabled according to the device configuration.

Set this bit to automatically validate the current packet and switch to the next bank for both IN and OUT endpoints.

For IN Transfer: 

If this bit is set, then the UDPHS_EPTSTAx register TXRDY bit is set automatically when the current bank is full and at
the end of DMA buffer if the UDPHS_DMACONTROLx register END_B_EN bit is set.

The user may still set the UDPHS_EPTSTAx register TXRDY bit if the current bank is not full, unless the user wants to
send a Zero Length Packet by software.

For OUT Transfer: 

If this bit is set, then the UDPHS_EPTSTAx register RXRDY_TXKL bit is automatically reset for the current bank when
the last packet byte has been read from the bank FIFO or at the end of DMA buffer if the UDPHS_DMACONTROLx reg-
ister END_B_EN bit is set. For example, to truncate a padded data packet when the actual data transfer size is reached.

The user may still clear the UDPHS_EPTSTAx register RXRDY_TXKL bit, for example, after completing a DMA buffer
by software if UDPHS_DMACONTROLx register END_B_EN bit was disabled or in order to cancel the read of the
remaining data bank(s).

If set, when an enabled endpoint-originated interrupt is triggered, the DMA request is disabled regardless of the UDPHS_IEN reg-
ister EPT_x bit for this endpoint. Then, the firmware will have to clear or disable the interrupt source or clear this bit if transfer 
completion is needed.

If the exception raised is associated with the new system bank packet, then the previous DMA packet transfer is normally com-
pleted, but the new DMA packet transfer is not started (not requested).

If the exception raised is not associated to a new system bank packet (NAK_IN, NAK_OUT...), then the request cancellation may 
happen at any time and may immediately stop the current DMA transfer.

This may be used, for example, to identify or prevent an erroneous packet to be transferred into a buffer or to complete a DMA 
buffer by software after reception of a short packet.

31

30

29

28

27

26

25

24

SHRT_PCKT

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

BUSY_BANK

–

–

15

14

13

12

11

10

9

8

NAK_OUT

NAK_IN

STALL_SNT

RX_SETUP

TXRDY

TX_COMPLT

RXRDY_TXKL

ERR_OVFLW

7

6

5

4

3

2

1

0

–

–

–

NYET_DIS

INTDIS_DMA

–

AUTO_VALID

EPT_ENABL