Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

554

SAM9X35 [DATASHEET]

11055E–ATARM–10-Mar-2014

Name: UDPHS_EPTSETSTAx 

[x=0..6]

Write-only

This register view is relevant only if EPT_TYPE=0x0, 0x2 or 0x3 in 

For additional Information, see 

0 = No effect.

1 = Set this bit to request a STALL answer to the host for the next handshake

Refer to chapters 8.4.5 (Handshake Packets) and 9.4.5 (Get Status) of the Universal Serial Bus Specification, Rev 2.0 for more 
information on the STALL handshake.

0 = No effect.

1 = Kill the last written bank.

0 = No effect.

1 = Set this bit after a packet has been written into the endpoint FIFO for IN data transfers

– This flag is used to generate a Data IN transaction (device to host). 

– Device firmware checks that it can write a data payload in the FIFO, checking that TXRDY is cleared.

– Transfer to the FIFO is done by writing in the “Buffer Address” register.

– Once the data payload has been transferred to the FIFO, the firmware notifies the UDPHS device setting 

TXRDY to one.

– UDPHS bus transactions can start.

– TXCOMP is set once the data payload has been received by the host.

– Data should be written into the endpoint FIFO only after this bit has been cleared.

– Set this bit without writing data to the endpoint FIFO to send a Zero Length Packet.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

TXRDY

–

RXRDY_TXKL

–

7

6

5

4

3

2

1

0

–

–

FRCESTALL

–

–

–

–

–