Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

750

SAM9X35 [DATASHEET]

11055E–ATARM–10-Mar-2014

Name: TWI_SR

0xF8010020 (0), 0xF8014020 (1), 0xF8018020 (2)

Access: Read-only

0x0000F009

TXCOMP used in Master mode: 

0 = During the length of the current frame.

1 = When both holding and shifter registers are empty and STOP condition has been sent.

TXCOMP used in Slave mode:

0 = As soon as a Start is detected.

1 = After a Stop or a Repeated Start + an address different from SADR is detected.

TXCOMP behavior in Slave mode can be seen in 

, 

.

0 = No character has been received since the last TWI_RHR read operation.

1 = A byte has been received in the TWI_RHR since the last read.

RXRDY behavior in Master mode can be seen in 

.

RXRDY behavior in Slave mode can be seen in 

, 

and 

.

TXRDY used in Master mode:

0 = The transmit holding register has not been transferred into shift register. Set to 0 when writing into TWI_THR register.

1 = As soon as a data byte is transferred from TWI_THR to internal shifter or if a NACK error is detected, TXRDY is set at the 
same time as TXCOMP and NACK. TXRDY is also set when MSEN is set (enable TWI).

TXRDY behavior in Master mode can be seen in 

.

TXRDY used in Slave mode:

0 = As soon as data is written in the TWI_THR, until this data has been transmitted and acknowledged (ACK or NACK).

1 = It indicates that the TWI_THR is empty and that data has been transmitted and acknowledged. 

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

EOSACC

SCLWS

ARBLST

NACK

7

6

5

4

3

2

1

0

–

OVRE

GACC

SVACC

SVREAD

TXRDY

RXRDY

TXCOMP