Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

Product codes
AT91SAM9X35-EK
Page of 1301
794
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
39.7.8.1 Modes of Operation
The USART can act either as a LIN Master node or as a LIN Slave node.
The node configuration is chosen by setting the USART_MODE field in the USART Mode register (US_MR):
LIN Master Node (USART_MODE=0xA)
LIN Slave Node (USART_MODE=0xB)
In order to avoid unpredicted behavior, any change of the LIN node configuration must be followed by a software reset of
the transmitter and of the receiver (except the initial node configuration after a hardware reset). (See 
)
39.7.8.2 Baud Rate Configuration
The baud rate is configured in the Baud Rate Generator register (US_BRGR).
39.7.8.3 Receiver and Transmitter Control
39.7.8.4 Character Transmission
39.7.8.5 Character Reception
39.7.8.6 Header Transmission (Master Node Configuration)
All the LIN Frames start with a header which is sent by the master node and consists of a Synch Break Field, Synch Field
and Identifier Field.
So in Master node configuration, the frame handling starts with the sending of the header.
The header is transmitted as soon as the identifier is written in the LIN Identifier register (US_LINIR). At this moment the
flag TXRDY falls.
The Break Field, the Synch Field and the Identifier Field are sent automatically one after the other.
The Break Field consists of 13 dominant bits and 1 recessive bit, the Synch Field is the character 0x55 and the Identifier
corresponds to the character written in the LIN Identifier Register (US_LINIR). The Identifier parity bits can be
automatically computed and sent (see 
The flag TXRDY rises when the identifier character is transferred into the Shift Register of the transmitter.
As soon as the Synch Break Field is transmitted, the flag LINBK in the Channel Status register (US_CSR) is set to 1.
Likewise, as soon as the Identifier Field is sent, the flag LINID in the Channel Status register (US_CSR) is set to 1. These
flags are reset by writing the bit RSTSTA to 1 in the Control register (US_CR).