Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1028
Up or down count mode can be configured on-the-fly by means of PWM_SMMR configuration registers.
When GCEN0 is set to ‘1’, channels 0 and 1 outputs are driven with gray counter.
Figure 40-6.
2-bit Gray Up/Down Counter
40.6.2.4   Dead-Time Generator
The dead-time generator uses the comparator output OCx to provide the two complementary outputs DTOHx and
DTOLx, which allows the PWM macrocell to drive external power control switches safely. When the dead-time
generator is enabled by setting the bit DTE to ‘1’ or 0 in the 
 (PWM_CMRx), dead-
times (also called dead-bands or non-overlapping times) are inserted between the edges of the two
complementary outputs DTOHx and DTOLx. Note that enabling or disabling the dead-time generator is allowed
only if the channel is disabled.
The dead-time is adjustable by the 
 (PWM_DTx). Both outputs of the dead-time
generator can be adjusted separately by DTH and DTL. The dead-time values can be updated synchronously to
the PWM period by using th
 (PWM_DTUPDx).
The dead-time is based on a specific counter which uses the same selected clock that feeds the channel counter
of the comparator. Depending on the edge and the configuration of the dead-time, DTOHx and DTOLx are delayed
until the counter has reached the value defined by DTH or DTL. An inverted configuration bit (DTHI and DTLI bit in
the PWM_CMRx) is provided for each output to invert the dead-time outputs. The following figure shows the
waveform of the dead-time generator.
PWMH0
DOWNx
GCEN0 = 1
PWMH1
PWML0
PWML1