Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

1030

The fields OSHx and OSLx in the 

 (PWM_OS) allow the outputs of the dead-time

generator DTOHx and DTOLx to be overridden by the value defined in the fields OOVHx and OOVLx in the 

 (PWM_OOV).

The set registers 

 (PWM_OSS) and 

 (PWM_OSSUPD) enable the override of the outputs of a channel regardless of other channels. In the

same way, the clear registers 

 (PWM_OSC) and 

 (PWM_OSCUPD) disable the override of the outputs of a channel regardless of other

channels.

By using buffer registers PWM_OSSUPD and PWM_OSCUPD, the output selection of PWM outputs is done
synchronously to the channel counter, at the beginning of the next PWM period.

By using registers PWM_OSS and PWM_OSC, the output selection of PWM outputs is done asynchronously to
the channel counter, as soon as the register is written.

The value of the current output selection can be read in PWM_OS.

While overriding PWM outputs, the channel counters continue to run, only the PWM outputs are forced to user
defined values.

8 inputs provide fault protection which can force any of the PWM output pairs to a programmable value. This
mechanism has priority over output overriding.

DTOHx

OOVHx

OOOHx

OSHx

0

1

DTOLx

OOVLx

OOOLx

OSLx

0

1

FIV0

fault input 0

Fault protection

on PWM

channel x

Glitch
Filter

FFIL0

from fault 0

from fault y

1

0

=

FPOL0

FMOD0

1

0

Fault 0 Status
FS0

FIV1

Glitch
Filter

FFIL1

1

0

=

FPOL1

FMOD1

1

0

Fault 1 Status
FS1

fault input 1

from fault 1

1

0

0

1

From Output

Override

OOHx

OOLx

From Output

Override

PWMHx

PWMLx

fault input y

FMOD1

Write FCLR0 at 1

FMOD0

Write FCLR1 at 1

SYNCx

1

0

FPEx[0]

FPE0[0]

SYNCx

1

0

FPEx[1]

FPE0[1]

0

1

FPVLx

High Impedance

State

0

1

FPVHx

High Impedance

State

FPZLx

FPZHx

SET

CLR

OUT

SET

CLR

OUT