Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
148
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
17.
Watchdog Timer (WDT)
17.1
Description
The Watchdog Timer (WDT) can be used to prevent system lock-up if the software becomes trapped in a deadlock.
It features a 12-bit down counter that allows a watchdog period of up to 16 seconds (slow clock around 32 kHz). It can
generate a general reset or a processor reset only. In addition, it can be stopped while the processor is in debug mode or
idle mode.
It features a 12-bit down counter that allows a watchdog period of up to 16 seconds (slow clock around 32 kHz). It can
generate a general reset or a processor reset only. In addition, it can be stopped while the processor is in debug mode or
idle mode.
17.2
Embedded Characteristics
12-bit key-protected programmable counter
Watchdog Clock is independent from Processor Clock
Provides reset or interrupt signals to the system
Counter may be stopped while the processor is in debug state or in idle mode
17.3
Block Diagram
Figure 17-1. Watchdog Timer Block Diagram
= 0
1
0
set
reset
read WDT_SR
or
reset
or
reset
wdt_fault
(to Reset Controller)
set
reset
WDFIEN
wdt_int
WDT_MR
SLCK
1/128
12-bit Down
Counter
Current
Value
WDD
WDT_MR
<= WDD
WDV
WDRSTT
WDT_MR
WDT_CR
reload
WDUNF
WDERR
reload
write WDT_MR
WDT_MR
WDRSTEN