Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
187
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
22.12.1 PMC System Clock Enable Register
Name:
PMC_SCER
Address:
0xFFFFFC00
Access:
Write-only
• DDRCK: DDR Clock Enable
0: No effect.
1: Enables the DDR clock.
• LCDCK: LCD Clock Enable
0: No effect.
1: Enables the LCD clock.
• UHP: USB Host OHCI Clocks Enable
0: No effect.
1: Enables the UHP48M and UHP12M OHCI clocks.
• UDP: USB Device Clock Enable
0: No effect.
1: Enables the USB Device clock.
• PCKx:  Programmable Clock x Output Enable
0: No effect.
1: Enables the corresponding Programmable Clock output.
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25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
PCK1
PCK0
7
6
5
4
3
2
1
0
UDP
UHP
LCDCK
DDRCK