Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
197
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
22.12.11 PMC Master Clock Register
Name:
PMC_MCKR
Address:
0xFFFFFC30
Access:
Read-write
• CSS: Master/Processor Clock Source Selection
• PRES: Master/Processor Clock Prescaler
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
PLLADIV2
–
–
MDIV
7
6
5
4
3
2
1
0
–
PRES
–
–
CSS
Value
Name
Description
0
SLOW_CLK
Slow Clock is selected
1
MAIN_CLK
Main Clock is selected
2
PLLA_CLK
PLLACK/PLLADIV2 is selected
3
PLLB_CLK
PLLBCK is selected
Value
Name
Description
0
CLOCK_DIV1
Selected clock
1
CLOCK_DIV2
Selected clock divided by 2
2
CLOCK_DIV4
Selected clock divided by 4
3
CLOCK_DIV8
Selected clock divided by 8
4
CLOCK_DIV16
Selected clock divided by 16
5
CLOCK_DIV32
Selected clock divided by 32
6
CLOCK_DIV64
Selected clock divided by 64
7
Reserved
Reserved