Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
28
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
7.2
System Controller Block DIagram
Figure 7-1. SAM9N12/CN11/CN12 System Controller Block Diagram
NRST
SLCK
Advanced
Interrupt
Controller
Periodic
Interval
Timer
Reset
Controller
PA0-PA31
periph_nreset
System Controller
Watchdog
Timer
wdt_fault
WDRPROC
WDRPROC
PIO
Controllers
Power
Management
Controller
XIN
XOUT
MAINCK
PLLACK
pit_irq
MCK
proc_nreset
wdt_irq
periph_irq[2..3]
periph_nreset
periph_clk[2..30]
PCK
MCK
MCK
pmc_irq
nirq
nfiq
nfiq
Embedded
Peripherals
periph_clk[2..3]
pck[0-1]
in
out
enable
out
enable
ARM926EJ-S
SLCK
irq
fiq
irq
fiq
periph_irq[5..30]
periph_irq[2..30]
int
int
periph_nreset
periph_clk[5..30]
jtag_nreset
por_ntrst
proc_nreset
periph_nreset
dbgu_txd
dbgu_rxd
pit_irq
dbgu_irq
pmc_irq
rstc_irq
wdt_irq
rstc_irq
SLCK
Boundary Scan
TAP Controller
jtag_nreset
debug
PCK
debug
idle
debug
Bus Matrix
MCK
periph_nreset
proc_nreset
periph_nreset
idle
Debug
Unit
dbgu_irq
MCK
dbgu_rxd
periph_nreset
dbgu_txd
Shut-Down
Controller
SLCK
backup_nreset
SHDN
WKUP
4 General-purpose
Backup Registers
backup_nreset
XIN32
XOUT32
PB0-PB18
PC0-PC31
VDDBU Powered
VDDCORE Powered
ntrst
VDDCORE
POR
16 MHz
MAIN OSC
PLLA
VDDBU
POR
SLOW
CLOCK
OSC
por_ntrst
VDDBU
USB Host
Full Speed
Port
UHPCK
periph_nreset
periph_irq[22]
32-Kbyte
RC OSC
PD0-PD21
SCKCR
SCKCR
Real-Time
Clock
rtc_irq
SLCK
backup_nreset
rtc_alarm
DDR sysclk
12 MHz RC
OSC
rtc_alarm
LCD Pixel clock
BSCR
USB Device
Full Speed
Port
UDPCK
periph_nreset
periph_irq[23]
UDPCK
UHPCK
PLLBCK
PLLB