Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
26.10.3 Bus Matrix Priority Registers A For Slaves
Name:
MATRIX_PRAS0...MATRIX_PRAS4
Addresses:
0xFFFFDE80 [0], 0xFFFFDE88 [1], 0xFFFFDE90 [2], 0xFFFFDE98 [3], 0xFFFFDEA0 [4]
Access:
Read-write 
• MxPR:  Master x Priority
Fixed priority of Master x for accessing the selected slave. The higher the number, the higher the priority.
All the masters programmed with the same MxPR value for the slave make up a priority pool.
Round-Robin arbitration is used inside the lowest (MxPR = 0) and highest (MxPR = 3) priority pools.
Fixed priority is used inside intermediate priority pools (MxPR = 1) and (MxPR = 2).
 for details.
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M5PR
M4PR
15
14
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12
11
10
9
8
M3PR
M2PR
7
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5
4
3
2
1
0
M1PR
M0PR