Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
381
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
30.9.2.2 Read is Controlled by NCS (READ_MODE = 0)
shows the typical read cycle of an LCD module. The read data is valid t
PACC
after the falling edge of the
NCS signal and remains valid until the rising edge of NCS. Data must be sampled when NCS is raised. In that case, the
READ_MODE must be set to 0 (read is controlled by NCS): the SMC internally samples the data on the rising edge of
Master Clock that generates the rising edge of NCS, whatever the programmed waveform of NRD may be.
READ_MODE must be set to 0 (read is controlled by NCS): the SMC internally samples the data on the rising edge of
Master Clock that generates the rising edge of NCS, whatever the programmed waveform of NRD may be.
Figure 30-11. READ_MODE = 0: Data is sampled by SMC before the rising edge of NCS
Data Sampling
t
PACC
MCK
D[31:0]
A[25:2]
NBS0,NBS1,
NBS2,NBS3,
A0, A1
NBS2,NBS3,
A0, A1
NCS
NRD