Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
406
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
30.16 Static Memory Controller (SMC) User Interface
The SMC is programmed using the registers listed in 
. For each chip select, a set of 4 registers is used to program the 
parameters of the external device connected on it. In 
, “CS_number” denotes the chip select number. 16 bytes (0x10) 
are required per chip select.
The user must complete writing the configuration by writing any one of the SMC_MODE registers.
Table 30-8. Register Mapping 
Offset
Register
Name
Access
Reset
0x10 x CS_number + 0x00
SMC Setup Register SMC_SETUP
Read-write
0x00000000
0x10 x CS_number + 0x04
SMC Pulse Register
SMC_PULSE
Read-write
0x01010101
0x10 x CS_number + 0x08
SMC Cycle Register
SMC_CYCLE
Read-write
0x00030003
0x10 x CS_number + 0x0C
SMC Mode Register
SMC_MODE
Read-write
0x10001000
 0xC0
SMC Delay on I/O
SMC_DELAY1
Read-write
0x00000000
 0xC4
SMC Delay on I/O
SMC_DELAY2
Read-write
0x00000000
 0xC8
SMC Delay on I/O
SMC_DELAY3
Read-write
0x00000000
 0xCC
SMC Delay on I/O
SMC_DELAY4
Read-write
0x00000000
 0xD0
SMC Delay on I/O
SMC_DELAY5
Read-write
0x00000000
 0xD4
SMC Delay on I/O
SMC_DELAY6
Read-write
0x00000000
 0xD8
SMC Delay on I/O
SMC_DELAY7
Read-write
0x00000000
 0xDC
SMC Delay on I/O
SMC_DELAY8
Read-write
0x00000000
 0xE4
SMC Write Protect Mode 
Register
SMC_WPMR
Read-write
0x00000000
 0xE8
SMC Write Protect Status 
Register
SMC_WPSR
Read-only
0x00000000
 0xEC-0xFC
Reserved