Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

To prevent any single software error that may corrupt DDRSDRC behavior, the registers listed below can be write-
protected by setting the WPEN bit in the DDRSDRC Write Protect Mode Register (DDRSDRC_WPMR).

If a write access in a write-protected register is detected, then the WPVS flag in the DDRSDRC Write Protect Status
Register (DDRSDRC_WPSR) is set and the field WPVSRC indicates in which register the write access has been
attempted.

The WPVS flag is automatically reset after reading the DDRSDRC Write Protect Status Register (DDRSDRC_WPSR).

Following is a list of the write protected registers:

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