Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
455
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
31.7.8 DDRSDRC Memory Device Register
Name:
DDRSDRC_MD
Address:
0xFFFFE820
Access:
Read-write
Reset:
See
This register can only be written if the WPEN bit is cleared in
.
• MD: Memory Device
Indicates the type of memory used. Reset value is for SDR-SDRAM device.
• DBW: Data Bus Width
Reset value is 16 bits.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
DBW
–
MD
Value
Name Description
0
SDR_SDRAM
SDR-SDRAM memory device.
1
LPSDR_SDRAM
Low-power SDR-SDRAM
2
DDR1_SDRAM
Reserved
3
LPDDR1_SDRAM
Low-power DDR1-SDRAM
4
DDR2_SDRAM
DDR2-SDRAM
Value
Name Description
0
BUS_32BIT
Data bus width is 32 bits (reserved for SDR-SDRAM device).
1
BUS_16BIT
Data bus width is 16 bits