Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
509
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
• DST_DSCR: Destination Address Descriptor
0 (FETCH_FROM_MEM): Destination address is updated when the descriptor is fetched from the memory.
1 (FETCH_DISABLE): Buffer Descriptor Fetch operation is disabled for the destination.
• FC: Flow Control
This field defines which device controls the size of the buffer transfer, also referred to as the Flow Controller.
• SRC_INCR: Incrementing, Decrementing or Fixed Address for the Source
• DST_INCR: Incrementing, Decrementing or Fixed Address for the Destination
• IEN: Interrupt Enable Not
0: When the buffer transfer is completed, the BTCx flag is set in the EBCISR status register. This bit is active low.
1: When the buffer transfer is completed, the BTCx flag is not set.
If this bit is cleared, when the buffer transfer is completed, the BTCx flag is set in the EBCISR status register. 
• AUTO: Automatic Multiple Buffer Transfer
0 (DISABLE): Automatic multiple buffer transfer is disabled.
1 (ENABLE): Automatic multiple buffer transfer is enabled. This bit enables replay mode or contiguous mode when several buf-
fers are transferred.
Value
Name
Description
00
MEM2MEM_DMA_FC
Memory-to-Memory Transfer DMAC is flow controller
01
MEM2PER_DMA_FC
Memory-to-Peripheral Transfer DMAC is flow controller
10
PER2MEM_DMA_FC
Peripheral-to-Memory Transfer DMAC is flow controller
11
PER2PER_DMA_FC
Peripheral-to-Peripheral Transfer DMAC is flow controller
Value
Name
Description
00
INCREMENTING
The source address is incremented
01
DECREMENTING
The source address is decremented
10
FIXED
The source address remains unchanged
Value
Name
Description
00
INCREMENTING
The destination address is incremented
01
DECREMENTING
The destination address is decremented
10
FIXED
The destination address remains unchanged