Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

For further details on the USB Device hardware implementation, see the specific Product Properties document.

The USB physical transceiver is integrated into the product. The bidirectional differential signals DDP and DDM are
available from the product boundary.

DDP and DDM are not controlled by any PIO controllers. The embedded USB physical transceiver is controlled by the
USB device peripheral.

To reserve an I/O line to check VBUS, the programmer must first program the PIO controller to assign this I/O in input
PIO mode.

The USB device peripheral requires a 48 MHz clock. This clock must be generated by a PLL with an accuracy
of ± 0.25%.

Thus, the USB device receives two clocks from the Power Management Controller (PMC): the master clock, MCK, used
to drive the peripheral user interface, and the UDPCK, used to interface with the bus USB signals (recovered 12 MHz
domain).

WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be enabled before any
read/write operations to the UDP registers including the UDP_TXVC register. 

The USB device interface has an interrupt line connected to the Interrupt Controller. 

Handling the USB device interrupt requires programming the Interrupt Controller before config-uring the UDP. 

UDP

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