Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
528
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
3.
The USB device sends an ACK PID packet to the host. The host can immediately send a second Data OUT
packet. It is accepted by the device and copied to FIFO Bank 1.
packet. It is accepted by the device and copied to FIFO Bank 1.
4.
The microcontroller is notified that the USB device has received a data payload, polling RX_DATA_BK0 in the end-
point’s UDP_CSRx register. An interrupt is pending for this endpoint while RX_DATA_BK0 is set.
point’s UDP_CSRx register. An interrupt is pending for this endpoint while RX_DATA_BK0 is set.
5.
The number of bytes available in the FIFO is made available by reading RXBYTECNT in the endpoint’s
UDP_CSRx register.
UDP_CSRx register.
6.
The microcontroller transfers out data received from the endpoint’s memory to the microcontroller’s memory. Data
received is made available by reading the endpoint’s UDP_FDRx register.
received is made available by reading the endpoint’s UDP_FDRx register.
7.
The microcontroller notifies the USB peripheral device that it has finished the transfer by clearing RX_DATA_BK0
in the endpoint’s UDP_CSRx register.
in the endpoint’s UDP_CSRx register.
8.
A third Data OUT packet can be accepted by the USB peripheral device and copied in the FIFO Bank 0.
9.
If a second Data OUT packet has been received, the microcontroller is notified by the flag RX_DATA_BK1 set in
the endpoint’s UDP_CSRx register. An interrupt is pending for this endpoint while RX_DATA_BK1 is set.
the endpoint’s UDP_CSRx register. An interrupt is pending for this endpoint while RX_DATA_BK1 is set.
10. The microcontroller transfers out data received from the endpoint’s memory to the microcontroller’s memory. Data
received is available by reading the endpoint’s UDP_FDRx register.
11. The microcontroller notifies the USB device it has finished the transfer by clearing RX_DATA_BK1 in the end-
point’s UDP_CSRx register.
12. A fourth Data OUT packet can be accepted by the USB device and copied in the FIFO Bank 0.
Figure 33-11. Data OUT Transfer for Ping-pong Endpoint
Note:
An interrupt is pending while the RX_DATA_BK0 or RX_DATA_BK1 flag is set.
Warning: When RX_DATA_BK0 and RX_DATA_BK1 are both set, there is no way to determine which one to clear first.
Thus the software must keep an internal counter to be sure to clear alternatively RX_DATA_BK0 then RX_DATA_BK1.
This situation may occur when the software application is busy elsewhere and the two banks are filled by the USB host.
Once the application comes back to the USB driver, the two flags are set.
Thus the software must keep an internal counter to be sure to clear alternatively RX_DATA_BK0 then RX_DATA_BK1.
This situation may occur when the software application is busy elsewhere and the two banks are filled by the USB host.
Once the application comes back to the USB driver, the two flags are set.
A
P
P
Data OUT
PID
ACK
Data OUT 3
Data OUT
Data OUT 2
Data OUT
Data OUT 1
PID
Data OUT 3
Data OUT 1
Data OUT1
Data OUT 2
Data OUT 2
PID
PID
PID
ACK
Cleared by Firmware
USB Bus
Packets
Packets
RX_DATA_BK0 Flag
RX_DATA_BK1 Flag
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 1
Data Payload Written
in FIFO Endpoint Bank 1
FIFO (DPR)
Bank 0
Bank 0
Bank 1
Write by USB Device
Write In Progress
Read By Microcontroller
Read By Microcontroller
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 0
Data Payload Written
in FIFO Endpoint Bank 0
Host Sends First Data Payload
Microcontroller Reads Data 1 in Bank 0,
Host Sends Second Data Payload
Host Sends Second Data Payload
Microcontroller Reads Data2 in Bank 1,
Host Sends Third Data Payload
Host Sends Third Data Payload
Cleared by Firmware
Write by USB Device
FIFO (DPR)
(UDP_CSRx)
(UDP_CSRx)
Interrupt Pending
Interrupt Pending