Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
566
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 35-5. SD Memory Card Bus Topology
.
Notes: 1.
I: input, O: output, PP: Push Pull, OD: Open Drain.
2.
When several HSMCI (x HSMCI) are embedded in a product, MCCK refers to HSMCIx_CK, MCCDA to
HSMCIx_CDA, MCDAy to HSMCIx_DAy.
HSMCIx_CDA, MCDAy to HSMCIx_DAy.
Figure 35-6. SD Card Bus Connections with One Slot
Note:
When several HSMCI (x HSMCI) are embedded in a product, MCCK refers to HSMCIx_CK, MCCDA to
HSMCIx_CDA MCDAy to HSMCIx_DAy.
HSMCIx_CDA MCDAy to HSMCIx_DAy.
When the HSMCI is configured to operate with SD memory cards, the width of the data bus can be selected in the
HSMCI_SDCR. Clearing the SDCBUS bit in this register means that the width is one bit; setting it means that the width is
four bits. In the case of High Speed MultiMedia cards, only the data line 0 is used. The other data lines can be used as
independent PIOs.
HSMCI_SDCR. Clearing the SDCBUS bit in this register means that the width is one bit; setting it means that the width is
four bits. In the case of High Speed MultiMedia cards, only the data line 0 is used. The other data lines can be used as
independent PIOs.
Table 35-5. SD Memory Card Bus Signals
Pin Number
Name
Type
Description
HSMCI Pin Name
(Slot z)
1
CD/DAT[3]
I/O/PP
Card detect/ Data line Bit 3
MCDz3
2
CMD
PP
Command/response
MCCDz
3
VSS1
S
Supply voltage ground
VSS
4
VDD
S
Supply voltage
VDD
5
CLK
I/O
Clock
MCCK
6
VSS2
S
Supply voltage ground
VSS
7
DAT[0]
I/O/PP
Data line Bit 0
MCDz0
8
DAT[1]
I/O/PP
Data line Bit 1 or Interrupt
MCDz1
9
DAT[2]
I/O/PP
Data line Bit 2
MCDz2
2 3 4 5 6
1
7 8
SD CARD
9
2345
6
17
MCDA0 - MCDA3
MCCDA
MCCK
8
SD CARD
9