Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

The TWI interface can perform various transfer formats: Transfers with 7-bit slave address devices and 10-bit slave
address devices.

When Addressing 7-bit slave devices, the internal address bytes are used to perform random address (read or write)
accesses to reach one or more data bytes, within a memory page location in a serial memory, for example. When
performing read operations with an internal address, the TWI performs a write operation to set the internal address into
the slave device, and then switch to Master Receiver mode. Note that the second start condition (after sending the IADR)
is sometimes called “repeated start” (Sr) in I

2

C fully-compatible devices. See 

 for Master Write operation with internal address.

The three internal address bytes are configurable through the Master Mode register (TWI_MMR).

If the slave device supports only a 7-bit address, i.e., no internal address, IADRSZ must be set to 0.

S

Start

Sr

Repeated Start

P

Stop

W

Write

R

Read

A

Acknowledge

NA

Not Acknowledge

DADR

Device Address

IADR

Internal Address

S

DADR

W

A

IADR(23:16)

A

IADR(15:8)

A

IADR(7:0)

A

DATA

A

P

S

DADR

W

A

IADR(15:8)

A

IADR(7:0)

A

P

DATA

A

A

IADR(7:0)

A

P

DATA

A

S

DADR

W

TWD

Three bytes internal address

Two bytes internal address

One byte internal address

TWD

TWD