Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
734
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
39.12 Two-wire Interface (TWI) User Interface
Note:
All unlisted offset values are considered as “reserved”.
Table 39-7. Register Mapping
Offset
Register
Name
Access Reset 
0x00
Control Register
TWI_CR
Write-only
0x04
Master Mode Register
TWI_MMR
Read-write
0x00000000
0x08
Slave Mode Register
TWI_SMR
Read-write
0x00000000
0x0C
Internal Address Register
TWI_IADR
Read-write
0x00000000
0x10
Clock Waveform Generator Register
TWI_CWGR
Read-write
0x00000000
0x14–0x1C
Reserved
0x20
Status Register
TWI_SR
Read-only
0x0000F009
0x24
Interrupt Enable Register
TWI_IER
Write-only
0x28
Interrupt Disable Register
TWI_IDR
Write-only
0x2C
Interrupt Mask Register
TWI_IMR
Read-only
0x00000000
0x30
Receive Holding Register
TWI_RHR
Read-only
0x00000000
0x34
Transmit Holding Register
TWI_THR
Write-only
0x00000000
0x38–0xE0
Reserved
0xE4
Protection Mode Register
TWI_WPMR
Read-write
0x00000000
0xE8
Protection Status Register
TWI_WPSR
Read-only
0x00000000
0xEC–0xFC
Reserved