Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
737
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
39.12.2 TWI Master Mode Register
Name: TWI_MMR
Addresses:
0xF8010004 (0), 0xF8014004 (1)
Access: Read-write
Reset: 
0x00000000
• IADRSZ: Internal Device Address Size
• MREAD: Master Read Direction
0: Master write direction. 
1: Master read direction.
• DADR: Device Address
The device address is used to access slave devices in read or write mode. Those bits are only used in Master mode.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DADR
15
14
13
12
11
10
9
8
MREAD
IADRSZ
7
6
5
4
3
2
1
0
Value
Name
Description
0
NONE
No internal device address
1
1_BYTE
One-byte internal device address
2
2_BYTE
Two-byte internal device address
3
3_BYTE
Three-byte internal device address