Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
745
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
39.12.8 TWI Interrupt Disable Register
Name:
TWI_IDR
Addresses:
0xF8010028 (0), 0xF8014028 (1)
Access: Write-only
Reset:
0x00000000
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
• TXCOMP: Transmission Completed Interrupt Disable
• RXRDY: Receive Holding Register Ready Interrupt Disable
• TXRDY: Transmit Holding Register Ready Interrupt Disable
• SVACC: Slave Access Interrupt Disable
• GACC: General Call Access Interrupt Disable
• OVRE: Overrun Error Interrupt Disable
• NACK: Not Acknowledge Interrupt Disable
• ARBLST: Arbitration Lost Interrupt Disable
• SCL_WS: Clock Wait State Interrupt Disable
• EOSACC: End Of Slave Access Interrupt Disable
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
EOSACC
SCL_WS
ARBLST
NACK
7
6
5
4
3
2
1
0
–
OVRE
GACC
SVACC
–
TXRDY
RXRDY
TXCOMP