Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
803
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
40.8.1 USART Control Register
Name:
US_CR
Addresses:
0xF801C000 (0), 0xF8020000 (1), 0xF8024000 (2), 0xF8028000 (3)
Access:
Write-only
.
• RSTRX: Reset Receiver
0: No effect.
1: Resets the receiver.
• RSTTX: Reset Transmitter
0: No effect.
1: Resets the transmitter.
• RXEN: Receiver Enable
0: No effect.
1: Enables the receiver, if RXDIS is 0.
• RXDIS: Receiver Disable
0: No effect.
1: Disables the receiver.
• TXEN: Transmitter Enable
0: No effect.
1: Enables the transmitter if TXDIS is 0.
• TXDIS: Transmitter Disable
0: No effect.
1: Disables the transmitter.
• RSTSTA: Reset Status Bits
0: No effect.
1: Resets the status bits PARE, FRAME, OVRE, MANERR, LINBE, LINISFE, LINIPE, LINCE, LINSNRE, LINID, LINTC, LINBK
and RXBRK in US_CSR.
and RXBRK in US_CSR.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
LINWKUP
LINABT
RTSDIS
RTSEN
–
–
15
14
13
12
11
10
9
8
RETTO
RSTNACK
RSTIT
SENDA
STTTO
STPBRK
STTBRK
RSTSTA
7
6
5
4
3
2
1
0
TXDIS
TXEN
RXDIS
RXEN
RSTTX
RSTRX
–
–