Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet
Product codes
AT91SAM9N12-EK
807
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
40.8.3 USART Mode Register
Name:
US_MR
Addresses:
0xF801C004 (0), 0xF8020004 (1), 0xF8024004 (2), 0xF8028004 (3)
Access:
Read-write
This register can only be written if the WPEN bit is cleared in
For SPI configuration, see
• USART_MODE: USART Mode of Operation
• USCLKS: Clock Selection
31
30
29
28
27
26
25
24
ONEBIT
MODSYNC
MAN
FILTER
–
MAX_ITERATION
23
22
21
20
19
18
17
16
INVDATA
VAR_SYNC
DSNACK
INACK
OVER
CLKO
MODE9
MSBF
15
14
13
12
11
10
9
8
CHMODE
NBSTOP
PAR
SYNC
7
6
5
4
3
2
1
0
CHRL
USCLKS
USART_MODE
Value
Name
Description
0x0
NORMAL
Normal mode
0x1
RS485
RS485
0x2
HW_HANDSHAKING
Hardware Handshaking
0x4
IS07816_T_0
IS07816 Protocol: T = 0
0x6
IS07816_T_1
IS07816 Protocol: T = 1
0x8
IRDA
IrDA
0xA
LIN_MASTER
LIN Master
0xB
LIN_SLAVE
LIN Slave
0xE
SPI_MASTER
SPI Master
0xF
SPI_SLAVE
SPI Slave
Value
Name
Description
0
MCK
Master Clock MCK is selected
1
DIV
Internal Clock Divided MCK/DIV (DIV=8) is selected
3
SCK
Serial Clock SLK is selected