Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
81
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
11.10.15 AIC Spurious Interrupt Vector Register
Name:
AIC_SPU
Address:
0xFFFFF134
Access:
Read-write
Reset: 
0x0
 
This register can only be written if the WPEN bit is cleared in 
• SIVR: Spurious Interrupt Vector Register 
The user may store the address of a spurious interrupt handler in this register. The written value is returned in AIC_IVR in case of 
a spurious interrupt and in AIC_FVR in case of a spurious fast interrupt.
31
30
29
28
27
26
25
24
SIVR
23
22
21
20
19
18
17
16
SIVR
15
14
13
12
11
10
9
8
SIVR
7
6
5
4
3
2
1
0
SIVR