Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

821

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

US_CSR

0xF801C014 (0), 0xF8020014 (1), 0xF8024014 (2), 0xF8028014 (3)

Read-only 

For SPI specific configuration, see 

.

0: No complete character has been received since the last read of US_RHR or the receiver is disabled. If characters were being 
received when the receiver was disabled, RXRDY changes to 1 when the receiver is enabled.

1: At least one complete character has been received and US_RHR has not yet been read. 

0: A character is in the US_THR waiting to be transferred to the Transmit Shift Register, or an STTBRK command has been 
requested, or the transmitter is disabled. As soon as the transmitter is enabled, TXRDY becomes 1.

1: There is no character in the US_THR.

0: No Break received or End of Break detected since the last RSTSTA.

1: Break Received or End of Break detected since the last RSTSTA.

0: No overrun error has occurred since the last RSTSTA.

1: At least one overrun error has occurred since the last RSTSTA.

0: No stop bit has been detected low since the last RSTSTA. 

1: At least one stop bit has been detected low since the last RSTSTA.

0: No parity error has been detected since the last RSTSTA.

1: At least one parity error has been detected since the last RSTSTA.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

MANERR

23

22

21

20

19

18

17

16

CTS

 – 

 – 

 – 

CTSIC

 – 

 – 

 – 

15

14

13

12

11

10

9

8

–

–

NACK

–

–

ITER

TXEMPTY

TIMEOUT

7

6

5

4

3

2

1

0

PARE

FRAME

OVRE

–

–

RXBRK

TXRDY

RXRDY