Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

Product codes
AT91SAM9N12-EK
Page of 1104
93
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
If a valid code is found, this code is loaded from NVM into internal SRAM and executed by branching at address
0x0000_0000 after remap. This code may be the application code or a second-level bootloader. All the calls to functions
are PC relative and do not use absolute addresses.
Figure 12-4.  Remap Action after Download Completion
12.2.4.3 Valid Code Detection
There are two kinds of valid code detection.
ARM Exception Vectors Check
The NVM bootloader program reads and analyzes the first 28 bytes corresponding to the first seven ARM exception
vectors. Except for the sixth vector, these bytes must implement the ARM instructions for either branch or load PC with
PC relative addressing.
Figure 12-5.  LDR Opcode
Figure 12-6.  B Opcode
Unconditional instruction: 0xE for bits 31 to 28
Load PC with PC relative addressing instruction:
Rn = Rd = PC = 0xF
I==0 (12-bit immediate value)
P==1 (pre-indexed)
U offset added (U==1) or subtracted (U==0)
W==1
REMAP
Internal
ROM
Internal
ROM
0x0010_0000
0x0000_0000
Internal
SRAM
0x0030_0000
Internal
SRAM
Internal
ROM
0x0010_0000
0x0000_0000
Internal
SRAM
0x0030_0000
31
28 27
24 23
20 19
16 15
12 11
0
1
1
1
0
0
1
I
P
U
1
W
0
Rn
Rd
Offset
31
28 27
24 23
0
1
1
1
0
1
0
1
0
Offset (24 bits)