Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

 1006

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.

Before using the AC97 Controller receiver, the PIO controller must be configured in order for the AC97C receiver
I/O lines to be in AC97 Controller peripheral mode.

Before using the AC97 Controller transmitter, the PIO controller must be configured in order for the AC97C trans-
mitter I/O lines to be in AC97 Controller peripheral mode.

The AC97 Controller is not continuously clocked. Its interface may be clocked through the Power Management
Controller (PMC), therefore the programmer must first configure the PMC to enable the AC97 Controller clock.

The AC97 Controller has two clock domains. The first one is supplied by PMC and is equal to MCK. The second
one is AC97CK which is sent by the AC97 Codec (Bit clock).

Signals that cross the two clock domains are re-synchronized. MCK clock frequency must be higher than the
AC97CK (Bit Clock) clock frequency.

The AC97 Controller interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). Handling
interrupts requires programming the AIC before configuring the AC97C.

All AC97 Controller interrupts can be enabled/disabled by writing to the AC97 Controller Interrupt Enable/Disable
Registers. Each pending and unmasked AC97 Controller interrupt will assert the interrupt line. The AC97 Control-
ler interrupt service routine can get the interrupt source in two steps:

• Reading and ANDing AC97 Controller Interrupt Mask Register (AC97C_IMR) and AC97 Controller Status 

Register (AC97C_SR).

• Reading AC97 Controller Channel x Status Register (AC97C_CxSR).

I/O Lines

AC97C

AC97CK

PD9

A

AC97C

AC97FS

PD8

A

AC97C

AC97RX

PD6

A

AC97C

AC97TX

PD7

A

Peripheral IDs

AC97C

24