Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

 1033

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

AC97C_SR

0xFFFAC050

 

  Read-only

WKUP and SOF flags in AC97C_SR register are automatically cleared by a processor read operation.

0: No Start of Frame has been detected since the last read of the Status Register. 

1: At least one Start of frame has been detected since the last read of the Status Register.

0: No Wake-up has been detected. 

1: At least one rising edge on SDATA_IN has been asynchronously detected. That means AC97 Codec has notified a
wake-up.

A Codec channel event occurs when AC97C_COSR AND AC97C_COMR is not 0. COEVT flag is automatically cleared
when the channel event condition is cleared.

0: No event on the CODEC channel has been detected since the last read of the Status Register. 

1: At least one event on the CODEC channel is active.

A channel A event occurs when AC97C_CASR AND AC97C_CAMR is not 0. CAEVT flag is automatically cleared when the
channel event condition is cleared.

0: No event on the channel A has been detected since the last read of the Status Register. 

1: At least one event on the channel A is active.

A channel B event occurs when AC97C_CBSR AND AC97C_CBMR is not 0. CBEVT flag is automatically cleared when the
channel event condition is cleared.

0: No event on the channel B has been detected since the last read of the Status Register. 

1: At least one event on the channel B is active.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

CBEVT

CAEVT

COEVT

WKUP

SOF