Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
1037
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
44. True Random Number Generator (TRNG)
44.1
Description
The True Random Number Generator (TRNG) passes the American
NIST Special Publication 800-22 and Diehard
Random Tests Suites.
As soon as the TRNG is enabled (TRNG_CTRL register), the generator provides one 32-bit value every 84 clock
cycles. Interrupt trng_int can be enabled through the TRNG_IER register (respectively disabled in TRNG_IDR).
This interrupt is set when a new random value is available and is cleared when the status register is read
(TRNG_SR register). The flag DATRDY of the status register (TRNG_ISR) is set when the random data is ready to
be read out on the 32-bit output data register (TRNG_ODATA).
cycles. Interrupt trng_int can be enabled through the TRNG_IER register (respectively disabled in TRNG_IDR).
This interrupt is set when a new random value is available and is cleared when the status register is read
(TRNG_SR register). The flag DATRDY of the status register (TRNG_ISR) is set when the random data is ready to
be read out on the 32-bit output data register (TRNG_ODATA).
The normal mode of operation checks that the status register flag equals 1 before reading the output data register
when a 32-bit random value is required by the software application.
when a 32-bit random value is required by the software application.
Figure 44-1.
TRNG Data Generation Sequence
84 clock cycles
84 clock cycles
84 clock cycles
Read TRNG_ISR
Read TRNG_ODATA
Read TRNG_ISR
Read TRNG_ODATA
clock
trng_int
trng_cr
enable