Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
1074
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
45.12.1
DMA Base Address Register 1
Name:
DMABADDR1
Address:
0x00500000
Access:
Read-write
Reset value:
0x00000000
• BADDR-U
Base Address for the upper panel in dual scan mode. Base Address for the complete frame in single scan mode.
If a dual scan configuration is selected in LCDCON2 register or bit DMA2DEN in register DMACON is set, the bit
DMAUPDT in that same register must be written after writing any new value to this field in order to make the DMA controller
use this new value.
DMAUPDT in that same register must be written after writing any new value to this field in order to make the DMA controller
use this new value.
31
30
29
28
27
26
25
24
BADDR-U
23
22
21
20
19
18
17
16
BADDR-U
15
14
13
12
11
10
9
8
BADDR-U
7
6
5
4
3
2
1
0
BADDR-U
0
0