Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

 1264

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

VDEC_PPIR

Read-write

0: Disables post-processor.

1: Enables post-processor.

Setting this bit high will start the post-processing operation. Hardware will reset this bit when a picture is processed.

0: Disables the pipeline.

1: Enables the pipeline.

When high, post-processing is performed in pipeline with decoder. When low, post-processor is processing different picture
than the decoder.

0: Enables Interrupts for post-processor.

1: Disables Interrupts for post-processor.

When high, there will be no interrupts issued by the post-processor. Polling must be used to see the hardware status.

0: Clears the post-processor Interrupt.

Software will reset this after the interrupt is handled.

1: Set the post-processor interrupt.

This bit drives the interrupt line, OR gated with the decoder interrupt bit.

Software will reset this after the interrupt is handled. The interrupt line is not used if the interrupt disable bit for post-proces-
sor is high.

0: Post processing in progress.

1: Post-processor is ready.

If decoder and post-processor are running in pipeline, this bit is not used.

When high, the hardware has post-processed a picture. Hardware will self-reset.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

BE

PPR

–

–

–

ISET

7

6

5

4

3

2

1

0

–

–

–

ID

–

–

PIPE

PPE