Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 141
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
19.7.3
Bus  Matrix  Priority  Registers  A  For  Slaves
Name:
MATRIX_PRAS0...MATRIX_PRAS7
Addresses:
0xFFFFEA80 [0], 0xFFFFEA88 [1], 0xFFFFEA90 [2], 0xFFFFEA98 [3], 0xFFFFEAA0 [4], 0xFFFFEAA8 [5], 
 
 
0xFFFFEAB0 [6], 0xFFFFEAB8 [7]
Access:
Read-write 
.
• MxPR:  Master  x  Priority
Fixed priority of Master x for accessing the selected slave. The higher the number, the higher the priority.
All the masters programmed with the same MxPR value for the slave make up a priority pool.
Round-Robin arbitration is used inside the lowest (MxPR = 0) and highest (MxPR = 3) priority pools.
Fixed priority is used inside intermediate priority pools (MxPR = 1) and (MxPR = 2).
See 
31
30
29
28
27
26
25
24
M7PR
M6PR
23
22
21
20
19
18
17
16
M5PR
M4PR
15
14
13
12
11
10
9
8
M3PR
M2PR
7
6
5
4
3
2
1
0
M1PR
M0PR