Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

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SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

When the external device asserts the NWAIT signal (active low), and after internal synchronization of this signal,
the SMC state is frozen, i.e., SMC internal counters are frozen, and all control signals remain unchanged. When
the resynchronized NWAIT signal is deasserted, the SMC completes the access, resuming the access from the
point where it was stopped. See 

. This mode must be selected when the external device uses the

NWAIT signal to delay the access and to freeze the SMC.

Write Access with NWAIT Assertion in Frozen Mode (EXNW_MODE = 10) 

EXNW_MODE = 10 (Frozen)
WRITE_MODE = 1 (NWE_controlled)

NWE_PULSE = 5
NCS_WR_PULSE = 7

A

[25:2]

MCK

NWE 

NCS

4

3

2

1

1

1

0

1

4

5

6

3

2

2

2

2

1

0

Write cycle

D[31:0]

NWAIT

FROZEN STATE

NBS0, NBS1,
NBS2, NBS3,
A0,A1

internally synchronized

NWAIT signal