Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 581
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
32.11.2
TWI  Master  Mode  Register
Name:
 TWI_MMR
Addresses:
0xFFF84004 (0), 0xFFF88004 (1)
Access: Read-write
Reset: 
0x00000000
• IADRSZ:  Internal  Device  Address  Size
• MREAD:  Master  Read  Direction
0 = Master write direction. 
1 = Master read direction.
• DADR:  Device  Address
The device address is used to access slave devices in read or write mode. Those bits are only used in Master mode.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DADR
15
14
13
12
11
10
9
8
MREAD
IADRSZ
7
6
5
4
3
2
1
0
IADRSZ[9:8]
0
0
No internal device address
0
1
One-byte internal device address
1
0
Two-byte internal device address
1
1
Three-byte internal device address