Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

 686

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

–SRC_DSCR is set to 1 (source address is contiguous).

–FC field is programmed with memory to peripheral flow control mode.

–Both DST_DSCR and SRC_DSCR are set to 1 (descriptor fetch is disabled).

–DIF and SIF are set with their respective layer ID. If SIF is different from DIF, DMA Controller is able 

to prefetch data and write HSMCI simultaneously.

h.

Program LLI(n).DMAC_CFGx register for channel x with the following field’s values:

–FIFOCFG defines the watermark of the DMA channel FIFO.

–DST_H2SEL is set to true to enable hardware handshaking on the destination.

–SRC_REP is set to 0. (contiguous memory access at block boundary)

–DST_PER is programmed with the hardware handshaking ID of the targeted HSMCI Host 

Controller.

i.

If LLI(n) is the last descriptor, then LLI(n).DSCR points to 0 else LLI(n) points to the start address of 
LLI(n+1).

j.

Program DMAC_CTRLBx for channel register x with 0. Its content is updated with the LLI fetch 
operation.

k.

Program DMAC_DSCRx for channel register x with the address of the first descriptor LLI(0).

l.

Enable Channel x writing one to DMAC_CHER[x]. The DMA is ready and waiting for request.

7.

Poll CBTC[x] bit in the DMAC_EBCISR Register.

8.

If a new list of buffers shall be transferred, repeat step 6. Check and handle HSMCI errors.

9.

Poll FIFOEMPTY field in the HSMCI_SR.

10. Send The STOP_TRANSMISSION command writing HSMCI_ARG then HSMCI_CMDR.

11. Wait for XFRDONE in HSMCI_SR register.

1.

Wait until the current command execution has successfully terminated.

a.

Check that CMDRDY and NOTBUSY are asserted in HSMCI_SR.

2.

Program the block length in the card. This value defines the value 

3.

Program the block length in the HSMCI configuration register with 

value.

4.

Set RDPROOF bit in HSMCI_MR to avoid overflow.

5.

Program HSMCI_DMA register with the following fields:

– ROPT field is set to 0.

– OFFSET field is set to 0.

– CHKSIZE is user defined.

– DMAEN is set to true to enable DMAC hardware handshaking in the HSMCI. This bit was previously 

set to false.

6.

Issue a READ_MULTIPLE_BLOCK command.

7.

Program the DMA Controller to use a list of descriptors: