Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

 781

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

Block Diagram

Access to the USB host operational registers is achieved through the AHB bus slave interface. The Open HCI host
controller and Enhanced HCI host controller initialize master DMA transfers through the AHB bus master interface
as follows:

• Fetches endpoint descriptors and transfer descriptors

• Access to endpoint data from system memory

• Access to the HC communication area

• Write status and retire transfer descriptor

Memory access errors (abort, misalignment) lead to an “Unrecoverable Error” indicated by the corresponding flag
in the host controller operational registers.

The USB root hub is integrated in the USB host. Several USB downstream ports are available. The number of
downstream ports can be determined by the software driver reading the root hub’s operational registers. Device
connection is automatically detected by the USB host port logic. 

USB physical transceivers are integrated in the product and driven by the root hub’s ports.

Over current protection on ports can be activated by the USB host controller. Atmel’s standard product does not
dedicate pads to external over current protection.

PORT S/M 1

PORT S/M 0

USB transceiver

HHSDPA

HHSDMA

Embedded USB

v2.0 High-speed Transceiver

Root Hub

and

Host SIE 

List Processor

Block

FIFO 64 x 8

HCI 

Slave Block

OHCI

Registers

Root

Hub Registers

AHB

ED & TD

Regsisters

Control

HCI 

Master Block

Data

AHB

Slave

Master

HFSDPA

HFSDMA

USB transceiver

HHSDPB

HHSDMB

HFSDPB

HFSDMB

AHB

AHB

Slave

Master

HCI 

Slave Block

EHCI

Registers

HCI 

Master Block

List

Processor

Packet

Buffer

FIFO

SOF

generator

Control

Data